Generating Digital Test Patterns - EEVblog

11, Aug. 2025

 

Generating Digital Test Patterns - EEVblog

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conducteur

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Generating Digital Test Patterns
« on: February 20, , 08:43:33 pm » I need/want to buy equipment to generate digital test patterns.
--> To generate digital signals where the logic level represents a '0' and '1' (TTL or 3.3V logic or other voltages) and where the signal can chance on a regular interval.
--> To generate digital signals where the duration of a pulse represents a '0' or a '1'.
--> Generating at least  8 bytes. More is better.
--> Up to 100kHz, More is better.
--> Being able to use different voltage ranges (ex TTL; 3.3V logic and even AC sqaure waves between plus and minus 15 volts per example).

- It's to test and debug microcontroller projects to decode many special serial protocols
-- Nice feature: the µC can generate a pulse on an IO Pin back to the generator when a correct pattern was detected. The generator knows wheter the generated pattern is correct, and counts how many times a (in)correct pattern was decoded (in)correctly?

Can i use an arbitrary waveform generator for that? Are there other (better) ways to do it?


« Last Edit: February 20, , 10:45:13 pm by conducteur »

billfernandez

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Re: Generating Digital Test Patterns
« Reply #1 on: February 20, , 09:58:18 pm » Except for counting when a correct pattern is detected, some arbitrary waveform generators (e.g. the Siglent SDGX https://www.eevblog.com/forum/testgear/the-siglent-sdgx-thread/) could be used for this, at the cost of about $500.

On the other hand, both the test pattern generation and the counting can be done with something like an Arduino or a Rasberry Pi using I/O pins.  But at the cost of having to do some construction and progamming, and without the 15V ability.

rstofer

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Re: Generating Digital Test Patterns
« Reply #2 on: February 20, , 11:48:59 pm » Out to patterns of 16 bits, the Digilent Analog Discovery will generate any digital pattern you want at just about any frequency from 100 mHz to 100 MHz in the conventional 1,2,5 pattern.  The pattern can be externally triggered with various timing and repeat options.  I didn't spend any particular effort on generating an 8 word pattern and watching it on my scope.

It will only do 3.3V output so if you want to scale it to 5V, you will need a level shifter.  If you want +-15V you will need an op amp or comparator.

http://store.digilentinc.com/analog-discovery-2-100msps-usb-oscilloscope-logic-analyzer-and-variable-power-supply/

It probably doesn't meet all of your wish list.  You might just want to use a uC to generate the signals and read back the results.  I might consider a CPLD or FPGA for such an application but changing the pattern might be a PITA.

You can install the Waveforms software and play with the demo device.  I don't know how

DaJMasta

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Re: Generating Digital Test Patterns
« Reply #3 on: February 21, , 12:09:20 am » I think the simplest method with this kind of low speed stuff is just going to be to buy a dev board for a micro or a cheap CPLD/FPGA with the interfaces you want to be able to test and enough firmware available to make opening those connections and sending data easy.  Then if you want wide ranges or AC transmission, you need a second supply, a transistor, and a cap for AC coupling, would be very simple to add on a breadboard and until you get into the few MHz range, having it on a breadboard shouldn't degrade the signal integrity significantly, especially at larger voltages.

There are certainly dedicated clock synthesizers or data pattern generators that can do this, but generally they'll be much higher bandwidth and much higher price to go along with it.  Probably great candidates for what you're trying to do, but many times more expensive than what will get the job done. « Last Edit: February 21, , 12:11:11 am by DaJMasta »

Boson

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Re: Generating Digital Test Patterns
« Reply #4 on: February 21, , 11:19:06 am »
Digilent Analog Discovery

+1, have AD2. Silly as scope with clumsy BNC addon but 5+ general purpose swiss knife.

woodchips

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Re: Generating Digital Test Patterns
« Reply #5 on: February 21, , 05:41:43 pm » Look for either a HP or .

NorthGuy

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Re: Generating Digital Test Patterns
« Reply #6 on: February 21, , 05:53:41 pm » If you do this for an MCU, then you probably already have a spare MCU (bread)board which can be programmed to generate arbitrary digital signal in a matter of minutes. It can read back your return signal and act upon it, and it'll do this part better than $2K ARBs.

billfernandez

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Re: Generating Digital Test Patterns
« Reply #7 on: February 21, , 07:36:52 pm » Just came upon this article about how to use Node-RED (drag and drop programming) with Raspberry Pi to control the I/O pins.  Looks like it might simplify life if you're inclined towards a DIY solution.


http://lifehacker.com/everything-you-need-to-get-started-controlling-a-raspbe-

https://www.raspberrypi.org/learning/getting-started-with-node-red/worksheet/

Berni

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Re: Generating Digital Test Patterns
« Reply #8 on: February 21, , 07:44:38 pm » I recently scored a Tektronix CSA 897T Pattern Generator on ebay for 40 USD.

It can generate 4KB long sequences of data at up to 700Mbit/s

james_s

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Re: Generating Digital Test Patterns
« Reply #9 on: February 21, , 08:44:33 pm » I think I would use a CPLD or FPGA, but then I've been working with those lately and there's a saying "When all you have is a hammer, everything looks like a nail."  I think it would be trivial to do what you want with one though. Or you could set up a simple binary counter to drive the address pins of a parallel flash eeprom and load it with whatever pattern(s) you want. Add additional eeproms with the address lines in parallel to increase the number of bits in the pattern.

Pattern Generators Pass the Digital Test - Electronic Design

By Gidget Cathcart, Agilent Technologies

Testing digital designs usually requires one or more digital signals, some of which can be very difficult to generate. Pattern generators are specifically designed to address this problem. Whatever digital stimulus signals are needed to exercise a specific device under test, a pattern generator most likely can provide them. In addition, an engineer can use a pattern generator to integrate digital patterns anywhere in the test sequence, from beginning to end. Pattern generators are also a good fit for applications such as semiconductor electrical testing, where pattern stimulus data is needed for fault testing, and a digital system controller running through user-defined control algorithms. On the software side, a pattern generator can function as a debugging tool for software engineers developing applications for the device under test (DUT).

SOLVING DIGITAL TEST CHALLENGES
In many digital tests, hardware and software engineers need the ability to generate digital stimuli to simulate infrequently encountered test conditions in hardware design and software program testing. One test challenge a pattern generator solves is providing digital stimulus where the normal digital signals to the device under test are missing. Again, in semiconductor electrical testing, pattern generators can be used to stimulate a digital circuit in order to evaluate output responses, which are then compared to expected responses to determine whether the device is faulty or not.

Digital stimulus may be missing in other applications such as a digital control system. For this application, multiple digital stimuli of varying widths may be required, with enough memory to produce the necessary bit stream patterns. In this case, a pattern generator is appropriate since it can be configured in widths of a byte, word and long word enabling up to 32- or 64-bit channels, depending on the instrument. In addition, if more channels or fanout is needed, additional generators can be connected to the system. In contrast, a function arbitrary-waveform generator with only single-or dual-bit output channels cannot provide the fan out capability needed except at an unreasonable test system cost. Figure 1 shows a conceptual block diagram of the device under test, stimulated by a pattern generator.

Another test challenge, other-than providing the stimulus for the missing digital signals to a device under test, is developing algorithmic bit patterns or vector sets to be downloaded into the pattern generator. A critical consideration the engineer needs to evaluate is the minimum test vector set or bit stream length, which translates into memory depth, to address the appropriate test model and test set for the device under test. Often times, this process takes some time to determine the minimum test vectors needed to test and stimulate the DUT for the desired response(s). In semiconductor electrical testing, these test vectors may come from a software program that uses algorithmic methods or pseudo random generators that can be used for the device, while other methods may be more of a manual task to determine the proper vector test sets.

In either case, automated or manual, optimization is a factor because this translates into how much pattern memory is needed to generate the patterns. This may be a critical factor in determining whether a specific pattern generator will work for the test vector set it needs to support for the DUT. Sometimes, due to the test vector size and the pattern depth needs, the test(s) may have to be augmented and partitioned into several segments to accomplish the task. Figure 2 shows a conceptual representation of a pattern generator vector test set.

Want more information on Digital Pattern Generators? Feel free to contact us.

PATTERN GENERATOR FEATURES AND FUNCTIONS
With many pattern generators, you can place a digital circuit or system in a desired state, operate it at a desired programmable frequency speed, single-step it through a series of states quickly and loop on a pattern. Some even have conditional triggering capabilities. Looping may be beneficial if the vector set is large and if a pattern sequence repeats. A looping option may be the ideal feature to minimize the vector size of the pattern waveform.

In control systems, conditional triggering is essential for giving a closed loop control action to either start a digital pattern sequencer or stop the sequencer based upon a defined digital system condition or response to another stimulus. Many triggering capabilities are defined as edge triggered or gate triggered giving the test engineer optimal flexibility in matching an application's requirements. Since pattern generators allow for testing at speed as well as troubleshooting faults by stepping through a bit pattern sequence, they are ideal for any test stage of the device under test whether it be early development or final system test.

Pattern generators are also useful for software test. Software debugging often involves emulation software and hardware support for the device under test. Having the ability to download hardware configurations to the DUT for specific device conditional states allows the software engineer to execute commands and algorithms quickly for software verification purposes. You can look ahead for desired states and compare and back track software steps for adjustments. Therefore, where appropriate, pattern generators can be used as simple serial links to download custom device under test configurations for software evaluation and test.

Furthermore, many software enabling tools are available to aid in the test development stage to get the hardware configuration up and running quickly. The tools range from custom proprietary software, standard drivers, front panel display control and even instrument web pages like those available with Agilent Technologies A and LXI LA digital I/O products. These give the user the ability to do quick configuration and exert control of the pattern generator through a web browser, saving valuable time. Figure 3 shows Agilent's web page interface tool.

CONSIDERATIONS WHEN SELECTING A PATTERN GENERATOR
When selecting a pattern generator, several things must be considered. The following is a list to keep in mind when evaluating and selecting the pattern generator that best fits your needs.

  1. Decide what hardware form factor and software requirements are needed to interface to your device under test. Many pattern generators come as standalone units or even in a modular architecture. They are also provided with industry standard software tools and layers of support.
  2. Determine how much development time you have allocated to address the test need. The out-of-box experience may be critical if you don't have time to study how to configure and program the pattern generator. Look for easy-to-configure software tools, like instrument web pages, to get your system up and running quickly. Many of these offerings are built into the product, saving time and money.
  3. Identify key performance characteristics of the pattern generator you require in terms of speed, triggering capabilities, memory depth, download/upload times, and electrical interface characteristics.
  4. Determine if any external hardware electrical signal conditioning is needed to support the DUT.

SUMMARY
Pattern generators are ideal for digital applications where digital stimulus signals may be missing to test a specific device under test. The rich feature sets provided by pattern generators allow an engineer to integrate the pattern generator anywhere in the test process from the beginning stages to the final stage of system test. Often times, pattern generators are handy and a good fit for semiconductor electrical testing, as a digital system controller running through user defined control algorithms, as well as a debugging tool for software engineers developing software applications for the device under test.

ABOUT THE AUTHOR
Gidget Cathcart holds a Bachelor of Engineering with Electrical Emphasis degree and is a digital hardware design engineer in Agilent's System Products Division. You can reach her by at [ protected]

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